Method of manufacturing a semiconductor device having a self-aligned structure for a split gate flash memory device
US5674767A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 1995 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Jul 10, 2015 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/103
Abstract
A method of manufacturing a nonvolatile memory device having a self-aligned structure includes the steps of forming a gate insulating film on a semiconductor substrate of a first conductivity type. A semiconductor layer is formed on the gate insulating film and etched to form floating gates and a semiconductor pattern between the floating gates. Impurity ions of a second conductivity type are implanted into the same side of the substrate as the floating gate is formed, to form a drain region. A planarizing film is deposited on the substrate and etched until the upper surfaces of the floating gates and the semiconductor pattern are exposed. The semiconductor pattern is removed and impurity ions of the second conductivity type are implanted into the substrate, to form a source region. The planarizing film is removed to expose the floating gate, and a dielectric film is formed thereon. Finally, a control gate is formed on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.