Recessed gate field effect transistor
US5675159A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 5, 1996 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Jan 5, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes a compound semiconductor body having a recess, the recess having a bottom and a hollow, and a refractory metal gate electrode having a lower portion within the hollow. The compound semiconductor body includes a compound semiconductor substrate; a channel layer including a compound semiconductor of a first conductivity type, the channel layer being located on the substrate between the gate electrode and the substrate; first active layers of the compound semiconductor and of the first conductivity type located on regions of the substrate in the recess where the channel layer is not present; and second active layers of the compound semiconductor and of the first conductivity type located on regions of the substrate in the recess where the channel layer is not present; and second active layers of the compound semiconductor of the first conductivity type located on regions of the substrate sandwiching the recess. Therefore, the controllable region in the channel layer is not adversely affected by a depletion layer produced at the interface between the first active layers and a passivation film, whereby an unwanted reduction in the control speed in the cha…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.