Digital DC correction circuit for a linear transmitter
US5675287A · kind A · utility
60Cited by
6References
8Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1996 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Feb 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G3/3042
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An amplifier structure (200) includes a main amplifier loop (203) for efficiently amplifying an input signal at a power amplifier (228) coupled to a load susceptible to impedance variations. The amplifier structure (200) includes a DC correction circuit (214) for detecting and correcting misadjustments in the amplifier (200) in order to eliminate DC offset associated therewith.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.