Image decoder for image compression/expansion system
US5675424A · kind A · utility
23Cited by
4References
5Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 8, 1995 |
| Grant date | Oct 7, 1997 |
| Priority date | — |
| Expiry date | Feb 8, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/30
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An image decoder for an image compression/expansion system of HDTV or MPEG standard having an image motion compensation process, in which transform coding of video signal is parallel-processed in the unit of a predetermined image block with a reduced-speed clock, and at the same time, motion compensation is processed in the unit of overall picture with an original high speed clock. According to the present invention, motion compensation errors generated in contour portions of respective parallel-processed subpictures can be prevented and accordingly, picture quality can be improved and also hardware construction can be simplified.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.