Method for multiplying packed data
US5677862A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 2, 1996 |
| Grant date | Oct 14, 1997 |
| Priority date | — |
| Expiry date | Apr 2, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/3828
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor. The processor includes a decoder being coupled to receive a control signal. The control signal has a first source address, a second source address, a destination address, and an operation field. The first source address corresponds to a first location. The second source address corresponds to a second location. The destination address corresponds to a third location. The operation field indicates that a type of packed data multiply operation is to be performed. The processor further includes a circuit being coupled to the decoder. The circuit is for multiplying a first packed data being stored at the first location with a second packed data being stored at the second location. The circuit is further for communicating a corresponding result packed data to the third location.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.