Programming flash memory using strict ordering of states
US5677869A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 14, 1995 |
| Grant date | Oct 14, 1997 |
| Priority date | — |
| Expiry date | Dec 14, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5647
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for programming an array of memory cells wherein each cell may be placed in more than two states. The method comprises the steps of 1) selecting a plurality of different programming voltage levels wherein each programming voltage level is associated with a corresponding one of a plurality of states, and 2) applying a plurality of programming pulses to selected subsets of the array of memory cells, wherein each programming pulse has one of the programming voltage levels and one of a corresponding plurality of pulse widths such that each of the memory cells of a corresponding one of the selected subsets are programmed directly to a corresponding one of the plurality of states by a corresponding programming pulse.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.