Memory system with dynamically allocatable non-volatile storage capability
US5680570A · kind A · utility
62Cited by
16References
24Claims
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Key dates
| Filing date | Sep 30, 1994 |
| Grant date | Oct 21, 1997 |
| Priority date | — |
| Expiry date | Sep 30, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/74
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory system having volatile storage of data destined for secondary storage and smaller intermediate non-volatile storage of some of the data. The volatile memory is an array of DRAM storage devices integrated with the non-volatile memory array of SRAM devices by a mapping logic unit. The DRAM array stores all the data blocks destined for secondary storage. In contrast, the smaller SRAM array stores only the data requiring safe storage, which typically is a subset of the data stored in the DRAM array. The mapping logic unit manages the use of the SRAM array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.