Current mirror arrangement
US5682094A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 5, 1996 |
| Grant date | Oct 28, 1997 |
| Priority date | — |
| Expiry date | Aug 5, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/265
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A current mirror arrangement comprising at least one input transistor of a first conductivity type, whose emitter is connected to a current supply line and whose collector is arranged to carry an input current. At least one output transistor of the first conductivity type has its emitter connected to the current supply line and its base to the base of the input transistor and from whose collector an output current can be taken. A follower transistor of the first conductivity type has its emitter connected to the bases of the input transistor and the output transistor and its base to the collector of the input transistor, and has its collector coupled to a reference potential. In order to ensure a well-defined load of the current supply line in any operating condition, the current mirror arrangement also includes a control transistor of a second conductivity type opposite to the first conductivity type. The control transistor has its collector connected to the collector of the input transistor and its emitter to the reference potential via an emitter current source. The base of the control transistor is arranged to receive a control voltage for controlling the output current. The co…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.