Low power consumption circuit and method of operation for implementing shifts and bit reversals
US5682340A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 3, 1995 |
| Grant date | Oct 28, 1997 |
| Priority date | — |
| Expiry date | Jul 3, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F5/015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention describes a circuit (10) and associated method of operation for implementing bit reversals and shifts of an input data. The circuit (10) includes a plurality of input lines (12), a plurality of output lines (14), a plurality of shifting transistors (16), a plurality of bit reversal transistors (20), control lines (18) and (22) for each, and a controller (24). The plurality of shifting transistors (16) operably couple the input lines (12) to the output lines (14) such that the controller (24) may selectively operate the shifting transistors (22) to produce shifted outputs of the input data D.sub.0 through D.sub.3 on the output lines (14). The controller (24) selectively operates the bit reversal transistors (20) to produce a bit reversed representation of the input data on the output lines (14). Precharge circuit (30) precharges the output lines (14) so that they may be statically driven. The circuit (10) may include multiplexors (25), (26), and (27) to enable arithmetic shifts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.