Apparatus and method for handling data transfer between a general purpose computer and a cooperating processor
US5682554A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 14, 1995 |
| Grant date | Oct 28, 1997 |
| Priority date | — |
| Expiry date | Nov 14, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus in a computer system for handling data transfer between a first data processing system and a second data processing system is described. The apparatus includes a buffer for storing data received from the first system at a first data transfer rate and then transferred to the second system at a second data transfer rate. The buffer generates a first indication signal when substantially full and a second indication signal when substantially empty. A first counter counts a first predetermined time interval when receiving the first indication signal, and generates a third indication signal when reaching the first predetermined time interval. The first counter stops counting and returns to an initial state when not receiving the first indication signal. A second counter counts a second predetermined time interval when receiving the second indication signal, and generates a fourth indication signal when reaching the second predetermined time interval. The second counter stops counting and returns to the initial state when not receiving the second indication signal. A first logic causes the first system to delay sending the data to the buffer when the first counter receives th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.