Preconditioning of output buffers
US5684410A · kind A · utility
Inventor
Key dates
| Filing date | Jul 3, 1995 |
| Grant date | Nov 4, 1997 |
| Priority date | — |
| Expiry date | Jul 3, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/00361
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An output buffer circuit for preconditioning an output signal at an output node so as to provide a higher speed of operation and less ground bounce noise includes an output buffer stage, a precondition feedback circuit, an output predriver, an output tristate control circuit, and an output state retention circuit. The output pre-driver with input equalization, which is also part of precondition control, combined with the output buffer stage designed with its threshold voltage matching component's input and output threshold voltage such that the output feedback, which bring the output and the input nodes of the output buffer stage together, will drive the output level to the threshold point enabled by the precondition signals before the data input signals arrive. The output buffer noise can be reduced by slowly driving output level to the output threshold point about three to four nanoseconds earlier than the data input signals arrive. The output state retention circuit is provided to help in minimizing the output glitch which occurs during output high-to-high or output low-to-low transition.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.