5 volt driver in a 3 volt CMOS process
US5684415A · kind A · utility
38Cited by
16References
25Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 22, 1995 |
| Grant date | Nov 4, 1997 |
| Priority date | — |
| Expiry date | Dec 22, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/018521
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A CMOS voltage level shifter that is comprised of a pull-up device coupled between a first voltage supply and an node to pull up that node to the voltage of the first voltage supply. The pull-up device is responsive to a first voltage signal. A pull-down device is also included that is coupled between the node and a reference voltage supply to pull down that node to a voltage of the reference voltage. The pull-down device is responsive to second and third voltage signals. A feedback circuit is included that provides the second voltage signal to the pull-down device. A level shifted output voltage signal is provided at the node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.