Fixed resistance high density parallel ROM device
US5684733A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 30, 1996 |
| Grant date | Nov 4, 1997 |
| Priority date | — |
| Expiry date | Sep 30, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C17/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention provides a fixed resistance sense-routed high density parallel ROM device for maintaining the resistance of a buried N+ region on a sense route constant. When data is read from a ROM cell matrix, the selection of different ROM cell transistors does not change the resistance of the buried N+ region on the sense route and thus enables a simplified design of a sense amplifier. The inactive select gate or transfer gate that is activated by the select line can be isolated by ion implantation for forming a buried P+ isolation and thus avoiding the narrowing or the cutting-off of the width of the active transfer gate or select gate due to ion diffusion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.