Method for manufacturing field emitter arrays
US5688707A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Jun 11, 1996 |
| Grant date | Nov 18, 1997 |
| Priority date | — |
| Expiry date | Jun 11, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J9/025
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The present invention provides a method for manufacturing field emitter arrays, comprising steps of forming a n.sup.+ -layer in a polycrystalline or amorphous silicon layer deposited on an insulating substrate, making an oxide layer disk pattern on said silicon layer, etching said silicon layer isotropically, forming a silicon oxide layer on the upper part of said silicon layer by means of the first oxidation, which results in field emitter tips, making hollows, depositing a silicon nitride layer with a predetermined thickness on said silicon oxide layer, removing said silicon nitride layer except that of the side-wall parts around said field emitter tips, forming a gate insulating layer by means of the second oxidation, removing said silicon nitride layer of said sidewall parts around said tips, making contact window, and forming gate electrodes and cathode contacts by depositing gate metal on said gate insulating layers. According to the present invention, field emitter arrays can be formed uniformly over a large area with pixels insulated therebetween.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.