System for generating status signals of second bus on first bus by comparing actual phase of the second bus with expected phase of second bus
US5689725A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 2, 1995 |
| Grant date | Nov 18, 1997 |
| Priority date | — |
| Expiry date | May 2, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/126
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is therefore directed to enhancing the efficiency with which input/output controllers execute operations in response to requests from another device, such as a main controller. In accordance with exemplary embodiments, a compact set of status information signals is communicated from an input/output controller to a main controller such that the main controller can provide error control (that is, monitor input/output controller operation) without the use of interrupts. As a result, the main controller can sequentially and continuously supply multiple commands of a transaction to the input/output controller without the use of a multiple hardware interrupts. System hardware can therefore be used more efficiently and input/output controller operation can be accelerated, thereby increasing system performance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.