Dual adjust current controlled phase locked loop
US5691669A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 11, 1996 |
| Grant date | Nov 25, 1997 |
| Priority date | — |
| Expiry date | Jan 11, 2016 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S331/02
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A dual adjust current-controlled phase locked loop is provided for allowing multiple-gain frequency acquisition of a signal. The dual adjust current-controlled phase locked loop includes a phase detector responsive to a reference signal and a synthesized signal for producing a phase error signal; a controller responsive to the phase error signal for generating coarse and fine adjust control signals; and a dual adjust current-controlled oscillator responsive to the coarse and fine adjust control signals for adjusting the oscillating frequency of the synthesized signal. The dual adjust current controlled oscillator includes a differential current controlled ring oscillator comprising a series of delay elements. Each delay element includes a high gain circuit responsive to the coarse adjust control signal and a low gain circuit responsive to the fine adjust control signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.