Method of fabricating thin film transistor with supplementary gates
US5693549A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 12, 1995 |
| Grant date | Dec 2, 1997 |
| Priority date | — |
| Expiry date | Sep 12, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6734
Abstract
A thin film transistor is provided on a insulative substrate and includes a polysilicon body film having a ridge portion formed on a predetermined portion of the substrate. A first gate insulation film, a main gate and a cap oxide film are successively formed on the ridge portion of the polysilicon body. A second gate insulation film is provided over the entire substrate surface covering the ridge portion and side surface of the gate insulation film, main gate and cap oxide film. Supplementary gates are then provided on the second gate insulation film adjacent respective sides of the ridge portion. Source and drain regions are then formed in portions of the polysilicon body film exposed by the main gate and the supplementary gates. Channel or offset regions can be formed in the polysilicon body film near the supplementary gates, thereby increasing channel length while minimizing area occupied by the transistor. A highly integrated device having reduced short channel effects can thus be achieved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.