Processing unit for generating signals for communication with a test access port
US5694399A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 10, 1996 |
| Grant date | Dec 2, 1997 |
| Priority date | — |
| Expiry date | Apr 10, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318572
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A system for interfacing with a test access communication port. Specifically, the present invention has application to the IEEE 1149.1 Test Access Port ("JTAG") standard. The novel system includes a hardware unit having a memory unit and a special processor unit (SPU) that interfaces between the test access port and components of a general purpose host computer system. The host computer system uses software procedures to formulate a set of compressed instructions instructing the hardware unit to generate and/or receive signals in connection with the test access port. In one embodiment, the host computer system contains configuration data in a special format. The host computer system translates this configuration data into the compressed instructions which are transmitted to the hardware unit causing it to download the configuration data using signals recognized by the test access port. The data is downloaded into a programmable integrated circuit device using the test access port. The SPU contains circuitry to expand the compressed instruction to generate the appropriate driving and receiving signals of the test access port. In one embodiment, clock, state machine, and data-in sign…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.