Method and apparatus for autocalibrating the center frequency of a voltage controlled oscillator of a phase locked loop
US5696468A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 29, 1996 |
| Grant date | Dec 9, 1997 |
| Priority date | — |
| Expiry date | Feb 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L2207/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The clock multiplying phase locked loop includes components for selectively setting a center frequency of a voltage controlled oscillator (VCO) to bias the VCO for operation within a selected range of input frequencies. To this end, the VCO is configured to output a signal at a selected center frequency based upon a tuning current provided to the VCO. Initially, a voltage input of the VCO is set to a reference voltage and a feedback signal is generated. The feedback signal, perhaps divided by N, is input to a phase-frequency detector. The phase-frequency detector also receives a reference frequency signal having a frequency at the selected center frequency. The detector outputs an UP or DOWN signal indicating whether the feedback signal is greater or less than the reference frequency signal. A center frequency adjustment unit receives the UP or DOWN signals from the detector and adjusts the tuning current to modify the center frequency of the VCO to reduce any difference between the feedback frequency and the reference frequency received by the phase-frequency detector. The VCO, the detector and the adjustment unit, as well as other components, operate in a loop causing the center …
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.