Dynamic random access memory having row decoder with level translator for driving a word line voltage above and below an operating supply voltage range
US5696721A · kind A · utility
12Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 5, 1995 |
| Grant date | Dec 9, 1997 |
| Priority date | — |
| Expiry date | May 5, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/10
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A circuit is designed with a decoder circuit (10), responsive to a first input signal (81) having a first voltage range, for producing a first output signal. An output circuit (11), responsive to the first output signal, produces a second output signal (26) having a second voltage range. The second voltage range includes a voltage less than a least voltage of the first voltage range and a voltage greater than a greatest voltage of the first voltage range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.