Semiconductor IC with FET and capacitor having side wall spacers and manufacturing method thereof
US5698463A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 29, 1996 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | May 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/811
Abstract
On the principal surface of an Si semiconductor substrate, a field oxide film is formed defining an active region. On the active region, an insulated gate structure is formed including a gate oxide film and a polycrystalline Si layer. At the same time, a lower capacitor electrode of the polycrystalline Si layer is formed on the field oxide film. The surface of the polycrystalline layer is oxidized to form an insulating film. Another polycrystalline Si layer is deposited covering the insulating film. A mask is formed over the lower capacitor electrode. By using this mask as an etching mask, anisotropic etching is performed to leave an upper capacitor electrode and side wall spacers on the side walls of the gate electrode and lower capacitor electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.