Nonvolatile semiconductor memory device
US5698879A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 18, 1995 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | Aug 18, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
A nonvolatile semiconductor memory device has reduced parasitic capacitance at a select transistor obtained by providing a depletion-mode select transistor with a charge accumulation layer, virtually making a gate insulating film thicker, or providing under the gate insulating film a channel layer that is of a same conductivity type as that of a source and drain regions and connects thereto, thereby enabling the potential of the select gate to be almost fixed at a desired value, preventing a faulty operation and making it possible to cause the select transistor to operate at high speed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.