Flow control apparatus and method for a computer interconnect using adaptive credits and flow control tags
US5699520A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 25, 1994 |
| Grant date | Dec 16, 1997 |
| Priority date | — |
| Expiry date | Aug 25, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L45/7453
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A flow control mechanism for packet-switched computer interconnect relates a packet in the interconnect to another packet in the interconnect by one or more various means. A packet is deemed stalled if it is stuck inside a switch packet buffer waiting to be forwarded due to unavailability of appropriate output ports. When an incoming packet begins to arrive, the switch checks to see if its internal packet buffers already contain a related packet that is currently stalled. If so, the switch immediately rejects the incoming packet. The incoming packet is only accepted if there are no related packets stalled inside the receiver. A switch may simultaneously contain several related packets that are in the process of being forwarded, but it may never contain more than one stalled packet. Adaptive routing is also limited by the assignment of adaptivity credits to each packet.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.