Apparatus and method for addition based on Kogge-Stone parallel algorithm
US5701504A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Dec 28, 1994 |
| Grant date | Dec 23, 1997 |
| Priority date | — |
| Expiry date | Dec 28, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2207/5063
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An adder which reduces signal propagation delay experienced by conventional adders by calculating bitwise carries and utilizing these bitwise carries as non-selecting inputs. In a preferred embodiment, the adder includes three primary circuits. The first circuit for generating propagate and generate signals based on its two inputs. The second circuit uses the propagate and generate signals in combination with a global carry-in signal to produce bitwise carries based on the Kogge-Stone Parallel Algorithm. These bitwise carries in combination with bit sums of the first and second digital inputs are used to calculate a plurality of real bit sums corresponding to the sum of these digital inputs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.