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US5704057A · kind A · utility

7Cited by
6References
9Claims
0Family size

Assignee

Inventor

Key dates

Filing dateOct 1, 1992
Grant dateDec 30, 1997
Priority date
Expiry dateOct 1, 2012

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F7/24
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An apparatus is provided to sort an incoming stream of data points in terms f data point value and time of occurrence thereof. A first and second memory each have an input for receiving the incoming data stream and an output. Each data point accesses an address of the first memory based upon a corresponding data point value. The value of the accessed address is incremented by one by an incrementing means. The output of the incrementing means is coupled to the first memory to store the incremented value at the accessed address. Each data point value is also indicative of a predetermined offset address stored in the second memory. An address latch is coupled to the first and second memories to generate a concatenated address based on the value of the accessed address (i.e., before it is incremented) and the offset address. Each successive time of occurrence is stored in a storage means at the concatenated address.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.