Large die photolithography
US5705299A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 16, 1992 |
| Grant date | Jan 6, 1998 |
| Priority date | — |
| Expiry date | Dec 16, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/70475
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
An improved reticle (20) and method of using it to expose layers of wafers for large integrated circuits (10). The integrated circuit (10) is designed so that nonrepeating patterns are laid out in perimeter areas, distinct from the center area containing contiguous repeating patterns. The reticle (20) is patterned with multiple masks (21-23), with different masks representing the repeating and nonrepeating patterns. The mask (22) representing the repeating pattern may then be stepped and illuminated separately from any mask (21, 23) representing a nonrepeating pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.