Packaging structure for a hermetically sealed flip chip semiconductor device
US5705858A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 14, 1994 |
| Grant date | Jan 6, 1998 |
| Priority date | — |
| Expiry date | Apr 14, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaging structure for a semiconductor device has plural hermetically sealed units each containing a flip-chip electrically interconnected to an intermediate substrate, circuit patterns of the flip-chips being within the sealed environment. Each hermetically sealed unit is connected to a base wiring substrate through soldered electrodes. Replacement of a flip-chip is accomplished by melting the solder joints between the flip-chip's respective hermetically sealed unit and the base wiring substrate. The flux vapor given off during this replacement process does not damage the circuit patterns of nearby flip-chips because they are contained in a sealed environment. Additionally, the electrodes between the flip-chips and intermediate substrate and between intermediate substrates and the base wiring layer contain projections which prevent crushing of solder between opposing electrodes and deformation of the flip-chip under a heavy load.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.