Frequency locked-loop using a microcontroller as a comparator
US5705955A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 1995 |
| Grant date | Jan 6, 1998 |
| Priority date | — |
| Expiry date | Dec 21, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/06
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A frequency-locked loop (100) employs a controllable oscillator (102) for generating an output signal having a frequency, optional sampler (104), coupled to oscillator (102), for sampling the frequency of the output signal, a divider (106), coupled to optional sampling circuit (104), for dividing the output signal frequency to generate a prescaled signal and a microprocessor (108), coupled between the divider 106 and oscillator (102), for comparing the prescaled signal to a reference signal and generating a control signal for correcting frequency shifts based upon the comparison. The control signal generated by microprocessor (108) is non-continuous. During that time when microprocessor (108) generates no control signals, power is removed from various frequency-locked loop circuitry.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.