Arbitration system for bus requestors with deadlock prevention
US5706446A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1996 |
| Grant date | Jan 6, 1998 |
| Priority date | — |
| Expiry date | Nov 12, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/364
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An arbitration logic system in a system control module regulates access to a common system bus as provided by a state machine which toggles access priority between two or more resource modules while preventing deadlock contention between two requesting modules while insuring that no module will be starved or denied access even though all the resource modules are contending for bus access. Any continuous deprivation or starvation of a module for bus access is prevented, in addition to any deadlock situations which are also prevented. This occurs by allowing retrying modules to request the bus at a temporarily higher priority and limiting the number of retries that any given requesting module is permitted to have.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.