Patent · US Expired

Method for receiver-side clock recovery for digital signals

US5708686A · kind A · utility

11Cited by

6References

16Claims

0Family size

Assignee

DEUTSCHE TELEKOM AG · DE

Inventors

Ulf Assmus · Darmstadt, DE
Willy Heckwolf · Munster, DE
Detlef Martin · Lutherstadt Eisleben, DE
Dieter Becker · Neunburg vorm Wald, DE

Key dates

Filing date	Mar 15, 1996
Grant date	Jan 13, 1998
Priority date	—
Expiry date	Mar 15, 2016

Classification

Technology area (CPC H)Electricity
CPC primaryH04L2012/5674
WIPO fieldTelecommunications
WIPO sectorElectrical engineering

Abstract

In a method for receiver-side clock recovery for digital signals having a constant bit rate following cell-structured, asynchronous transmission with pauses of different length between individual cells using the loading state of an FIFO memory into which the received digital signals are written, at the start of a transmission the digital signals are initially read with a received clock into the FIFO memory holding multiple cells of the received signals until the FIFO memory is half filled. The digital signals written into the FIFO memory are read out with a readout clock whose frequency is smaller than the frequency of the received clock. During the readout a signal for controlling the frequency of the readout clock is derived from the respective loading state of the FIFO memory.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.