Asynchronous access system for multiprocessor system and processor module used in the asynchronous access system
US5708795A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 1994 |
| Grant date | Jan 13, 1998 |
| Priority date | — |
| Expiry date | Jan 31, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an asynchronous access system for a multiprocessor system having a plurality of processor modules connected to a system bus and at least one shared memory module connected to the system bus, each of the processor modules includes a processor and an internal buffer. The processor writes data into the internal buffer, and the data is read from the internal buffer and is written into the shared memory via the system bus. The asynchronous access system includes a first unit, provided in each of the processor modules, for detecting a predetermined situation regarding a data write from the processor to the shared memory, and a second unit, provided in each of the processor modules, for causing the data stored in the internal buffer to be written into the shared memory module when the first unit detects the predetermined situation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.