Non-volatile memory in power and linear integrated circuits
US5710515A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 7, 1995 |
| Grant date | Jan 20, 1998 |
| Priority date | — |
| Expiry date | Jun 7, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A testable temperature warning circuit (120) in an integrated circuit substrate (124) provides a warning if the substrate temperature exceeds a critical temperature. A programming circuit (140) controls a selection, circuit (128) to establish a programmably selectable temperature at either the critical temperature or a second predetermined temperature lower than the critical temperature to enable the warning circuit operation to be tested at a temperature lower than the critical temperature. In one embodiment, the selection circuit 128 comprises a current source that produces a voltage drop across the resistor 121 and base-emitter of the transistor 122 produces a substrate temperature indicating current of magnitude related to the temperature of the substrate. The substrate temperature indicating current at the second temperature is extrapolatingly related to the substrate temperature indicating current at the critical temperature. A method is also presented for testing a temperature warning circuit fabricated in an integrated circuit substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.