Method and apparatus for protecting an integrated circuit from current overload
US5710690A · kind A · utility
3Cited by
2References
39Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 9, 1995 |
| Grant date | Jan 20, 1998 |
| Priority date | — |
| Expiry date | Jun 9, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/0822
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A non-dissipative device for protecting an integrated circuit having multiple independent channels against overloading. The non-dissipative device includes an input terminal and an output terminal having an integrated switch connected therebetween which consists of an input portion, a logic gate with two inputs a control portion, and an output portion, all connected in series with one another. The device further includes a generating circuit for generating the on-times and off-times of the integrated switch, the generating circuit is connected between an output of the output portion and an input of the logic gate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.