Frame synchronizing device
US5710774A · kind A · utility
Assignees
Inventors
Key dates
| Filing date | Nov 13, 1995 |
| Grant date | Jan 20, 1998 |
| Priority date | — |
| Expiry date | Nov 13, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0608
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A frame synchronizing device for discriminating a time slot location for each channel of time-division multiplexed signals is disclosed. The frame synchronizing device according to the invention processes time-division multiplexed signals in parallel in a STM-4C(Synchronous Transport Module-4 Concatenation) of the Broadband Integrated Service Digital Network according to the ITU-T recommendation, such that the searching of frame synchronization can be achieved by detecting frame bytes on data being received at a high speed in the STM-4C structure to align the bytes based on the detected time interval, converting the frame data into the 8-bits parallel data and then detecting, in sequence, the frame bytes at a lower speed clock being divided by 8, thereby providing a simplified, less power consumptive frame synchronizing device in the STM-4C structure according to the ITU-T recommendation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.