Field emission device with lattice vacancy, post-supported gate
US5711694A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 26, 1996 |
| Grant date | Jan 27, 1998 |
| Priority date | — |
| Expiry date | Jun 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01J9/025
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An electron emitter plate (110) for an FED image display has an extraction (gate) electrode (22) spaced by a dielectric insulating spacer (125) from a cathode electrode including a conductive mesh (18). Arrays (12) of microtips (14) are located in mesh spacings (16), within apertures (26) formed in clusters (23) in extraction electrode (22). Microtips (14) are deposited through the apertures (26). Apertures (26) are arranged in regular, periodic arrays (23, 23', 123, 123') defining lattices having occupied apertured positions and internal unapertured vacancy positions (150, 150'). The insulating spacer (125) is etched to undercut electrode (22) to connect apertured lattice positions, forming a common cavity (141) for microtips (14) within each mesh spacing (16), and leaving central posts (143) at the unapertured vacancies (150, 150'). The etch-out reduces the dielectric constant factor of gate-to-cathode capacitance in the finished structure. Placing posts at vacancy positions enables gate support over the cavity without sacrificing high microtip density.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.