Semiconductor device capacitor manufactured by forming stack with multiple material layers without conductive layer therebetween
US5714401A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 1995 |
| Grant date | Feb 3, 1998 |
| Priority date | — |
| Expiry date | Aug 31, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/318
Abstract
A method is provided for manufacturing a capacitor of a semiconductor device. First, an insulating layer, an etching barrier layer, a first material layer and a second material layer are sequentially stacked on a semiconductor substrate on which a field oxide layer and a gate electrode are formed, and predetermined portions of the stacked layers are sequentially etched to form a contact hole exposing the substrate. Then, a first conductive layer is formed on thge whole surface of the resultant structure having the contact hole. Subsequently, a storage electrode pattern is formed by patterning the first conductive layer and etching the second material layer. Then, a second conductive layer is formed on the whole surface of the resultant structure so as to cover the storage electrode pattern and the first material layer. Thereafter, the second conductive layer is etched to expose the upper surface of the storage electrode pattern. Therefore, the capacitor manufacturing process, particularly, the etching process, is simplified, and can be applied to a capacitor having a COB structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.