Semiconductor memory device and automatic bit line precharge method therefor
US5715203A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 18, 1996 |
| Grant date | Feb 3, 1998 |
| Priority date | — |
| Expiry date | Mar 18, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1072
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a semiconductor memory device having a bit line precharge circuit which precharges bit lines forming a data transfer path coupled to cells. The memory device is further provided with a first control circuit which controls the bit line precharge circuit to precharge the bit lines in response to a bit line precharge request, and a second control circuit which recognizes a command input from outside and makes the bit line precharge request with respect to the first control circuit. The second control circuit accepts a selection of whether or not to request automatic precharge of the bit lines when making an entry to a burst mode even when a burst length is set to a full column, and makes the bit line precharge request with respect to the first control circuit so that the bit lines are precharged after the burst mode ends when an entry to the burst mode requests the automatic precharge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.