Memory device with an internal data transfer circuit
US5715423A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Apr 18, 1994 |
| Grant date | Feb 3, 1998 |
| Priority date | — |
| Expiry date | Apr 18, 2014 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/102
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A memory that resides on a single substrate includes (1) a memory array having a first block and a second block and (2) control circuitry coupled to the memory array for performing memory operations with respect to the memory array. A data transfer circuit is provided in the memory that is coupled to the control circuitry and is responsive to a data transfer command received from an external circuit. The data transfer circuit controls the control circuitry to perform a data transfer operation to transfer data from the first block to the second block. The data is first read from the first block of the memory. The data read from the first block of the memory is then stored in a buffer of the memory. The data stored in the buffer is then written into the second block of the memory such that the data is transferred from the first block of the memory device to the second block of the memory device without leaving the memory. A method of transferring data within the memory is also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.