Data link layer protocol for transport of ATM cells over a wireless link
US5717689A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 10, 1995 |
| Grant date | Feb 10, 1998 |
| Priority date | — |
| Expiry date | Oct 10, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5652
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The present invention is a reliable data link layer protocol to transport ATM cells over a wireless point-to-point link. The protocol ensures that the cells are transported reliably by use of a sliding window transport mechanism with selective repeat automatic repeat request (ARQ) and forward error correction (FEC). The protocol minimizes ATM header overhead by means of header compression and provides per-cell FEC whose size can be changed adaptively. The protocol also provides parity cells for recovery from errors that cannot be corrected using the per-cell FEC field. The number of these cells as well as the size of a window or frame can also be adaptively changed. In addition, the window can be terminated to request an immediate acknowledgment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.