Method and apparatus for accessing internal integrated circuit signals
US5717699A · kind A · utility
32Cited by
2References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 18, 1996 |
| Grant date | Feb 10, 1998 |
| Priority date | — |
| Expiry date | Jul 18, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/318516
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for analyzing a programmable logic device (PLD) that provides access to internal nodes of the circuit. The method and apparatus in accordance with the present invention uses a shadow programmable logic device to emulate the target PLD while coupling input and output terminals of the shadow PLD so as to provide more information about the target PLD than can be obtained from the target PLD itself. Also, the shadow PLD can implement internal stimulus and/or response functions to provide improve analyzing capability not possible with the target PLD alone.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.