High frequency/high output insulated gate semiconductor device with reduced and balanced gate resistance
US5719429A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 27, 1995 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | Dec 27, 2015 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/257
Abstract
An insulated gate semiconductor device, which improves high frequency characteristics by reducing the resistance of a path from a gate bonding portion to each gate and eliminating an unbalance in resistances of respective gates, and which obtain a higher output by eliminating a limitation in current capacity due to the thickness of a first metal layer. In this insulated gate semiconductor device, a first aluminum layer is connected in parallel onto a gate electrode made of polycrystalline silicon. The adjacent gates, each having such a double layer structure, extend outside channel regions and are connected to each other. A lead-out electrode of a second aluminum layer is connected to the center of the connection portion of the adjacent gates through an opening portion. A gate bonding portion is provided at the center of the lead-out electrode. Each of source and drain electrodes is also of a double layer structure having the first aluminum layer and the second aluminum layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.