Integrated half-bridge timing control circuit
US5719521A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Oct 29, 1996 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | Oct 29, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/063
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An integrated half-bridge timing control circuit for driving a half-bridge output stage has high-side and low-side power transistors coupled together at a high-voltage output terminal, and a bistable circuit for generating a high-side timing control waveform. The bistable circuit is driven by two delay circuits, each of which is decoupled from the high-side voltage by an associated interface circuit. The interface circuits are driven by input voltages which are delayed with respect to each other and which are referenced to the low side (ground). In this manner, an integrated half-bridge timing control circuit is obtained which is capable of operating at high frequencies with little power loss, which can be easily integrated, and which is both accurate and easily adjustable in operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.