Full-search block matching motion estimation processor
US5719642A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | May 7, 1996 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | May 7, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/433
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A full-search block matching motion estimation processor includes a memory management unit for buffering search data of a (2P+N).times.(2P+N) search area, and a processor element array unit. The search area is divided into rows of the search data, and the memory management unit has N output bus lines and sequentially outputs the rows of the search data at the output bus lines. The processor element array unit includes an array of processor elements, each of which has at least one reference data input, at least one search data input connected to one of the search data inputs of the processor elements on the same row of the array and further connected to one of the output bus lines of the memory management unit, a partial sum output, and a partial sum input connected to the partial sum output of a preceding one of the processor elements on the same row of the array. Each of the processor elements includes at least one calculating unit for calculating a mean absolute difference between reference data at one of the reference data inputs and the search data at a corresponding one of the search data inputs, and an adder for adding the mean absolute difference from the calculating units t…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.