Semiconductor memory device capable of storing high potential level of data
US5719814A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Sep 25, 1996 |
| Grant date | Feb 17, 1998 |
| Priority date | — |
| Expiry date | Sep 25, 2016 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4091
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In a semiconductor memory device, a row decoder is connected to a plurality of word lines to select one of the plurality of word lines in response to a row address. A word line driving section drives, in response to a row address strobe signal, the selected word line to a first potential higher by a predetermined potential than a predetermined second potential, for a read or write operation to a selected memory cell connected to the selected word line and a selected pair of bit lines. The second potential is higher than a power supply higher side potential. A sense amplifier activating section issues sense amplifier activating signals for the write operation to the selected memory cell in response to a sense control signal such that a data having a potential higher than the power supply higher side potential can be written or rewritten in the selected memory cell. Each of a plurality of sense amplifiers amplifies the data on corresponding pair of bit lines in response to the sense amplifier activating signals. In the read operation, the read data is outputted from an input/output section via a column selecting section for selecting and connecting one of the plurality of pairs of bi…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.