Voltage-controlled reset for logic state initialization
US5721502A · kind A · utility
15Cited by
4References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 25, 1997 |
| Grant date | Feb 24, 1998 |
| Priority date | — |
| Expiry date | Feb 25, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K17/223
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A voltage divider and inverter provide a power-on-reset signal. The divider is placed between high and low power voltages, the divided voltage is the input to the inverter and the output of the inverter is the power-on-reset signal. The divider and inverter may be implemented on a single integrated circuit and accompany other, control and operational, circuitry on the integrated circuit. The divider is chosen so that the input to the inverter reaches the inverter's threshold voltage when the power voltage reaches a predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.