Digital receiver with tunable analog parameters and method therefor
US5721756A · kind A · utility
34Cited by
10References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1996 |
| Grant date | Feb 24, 1998 |
| Priority date | — |
| Expiry date | Mar 26, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L27/22
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A digital data receiver includes tunable analog components having variable parameters that are responsive to the bit error rate (BER) of the decoded digital data. The analog components include a quadrature generator having a tunable phase shifter, an analog filter having a tunable bandwidth, a tunable magnitude equalizer circuit, a tunable group delay equalizer circuit, and an amplifier having an adjustable gain. The tunable components are controlled by tuning control signals that incorporate digitally-produced fine tuning signals. The digital tuning signals are altered in accordance with realtime changes in the BER.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.