Noise cancelling circuit and arrangement
US5724038A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 1996 |
| Grant date | Mar 3, 1998 |
| Priority date | — |
| Expiry date | Feb 12, 2016 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M3/504
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A noise cancelling circuit (10) is used with a D/A converter, the converter including a first modulator (11) and a data output. The circuit (10) has an error measuring arrangement (12, 13, 14) for measuring a quantization error signal of the modulator (11). A filter (19) receives the error signal end provides a fired error signal. A filter compensator (17) is coupled to the data output and provides a compensated output. A scaler (15) is coupled to receive the filtered error signal and provides a scaled filtered error signal. A second modulator (16) is coupled to receive the scaled filtered error signal and provides a single bit stream of error data. A summing arrangement (18) sums the single bit stream of error data and the compensated output from the first modulator and provides a corrected output, such that the error signal is filtered, sealed and modulated end the data output is compensated such that the corrected output is obtained having a substantially reduced quantization error.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.