Composite clock signal
US5724360A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 21, 1994 |
| Grant date | Mar 3, 1998 |
| Priority date | — |
| Expiry date | Apr 21, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04J3/0685
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
A composite reference signal distributes with one single signal both a clock signal and a synchronizing signal. This synchronizing signal is detected in a subsequent bit clocking generator for a high bit clocking frequency. Jitter that may exist on the edges of the clock signal will not influence the definition of the locally obtained synchronizing signal, and each data bit frame defined by the synchronizing signal will always include the exact number of data bits at the bit clocking frequency. The bit clocking generator includes a phase-locked loop, a dividing circuit, a shift register, and a logic gate for generating from the composite signal the bit clocking signal with its frame reference. In addition to the bit clocking frequency, a synchronizing pulse is obtained from the bit clocking generator that has high precision in relation to both the high frequency system clock and an external time domain transferred through the composite reference signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.