Semiconductor device having a plated heat sink
US5726494A · kind A · utility
1Cited by
2References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 27, 1997 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Feb 27, 2017 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3511
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device having a plated heat sink structure is provided, in which an Au layer (5) high in thermal expansion coefficient is formed on the lower surface of a GaAs substrate (1) having a source electrode (2), a gate electrode (3) and a drain electrode (4) of a field effect transistor on the upper surface, and, a W layer (6) low in thermal expansion coefficient is formed on the lower surface of the Au layer (5). Warping of the device after mounted on a package is reduced on the ground of such a plated heat sink structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.