Minimum/maximum data detector
US5726923A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1995 |
| Grant date | Mar 10, 1998 |
| Priority date | — |
| Expiry date | Oct 25, 2015 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/544
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A minimum/maximum data detector for rapidly detecting the minimum or the maximum data from a plurality of numeric data. In FIG. 1 , one of consecutive numeric data stored in memory 1 is read out by an address designated by a register 2, and is transferred to registers 5 and 6. A counter 9 counts up the number of numeric data which have been stored in register 6. The contents of the registers 5 and 11 are compared by a circuit 4. When detecting minimum data, if the contents of the register 5 are judged to be smaller, the contents of the register 6 and the counted results of the counter 9 are linked in an index linking circuit 10. The linked result is then stored in the specific register 11. The content of the register 2 is incremented by "1" whenever the comparison is executed. Once the read out of one series of consecutive numeric data have been completed, then the numeric data remaining in the specific register 11 is the minimum data. The address of the minimum data in the memory 1 can be obtained by adding the index (counted results) and the top address utilized at the beginning of the detection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.